This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the subject matter described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, these statements are to be read in this light, not as admissions of prior art.
The present disclosure relates generally to debugging. More specifically, embodiments disclosed herein relate to non-intrusive debug techniques in processor-based systems.
Debug is the process of identifying errors or “bugs” that prevent a computing system, such as a processor-based system, from operating correctly. As used herein, a processor-based system refers to an electronic system that includes one or more processors, such as single-core and/or multi-core processors. The goal of debug is to identify and resolve such errors. For example, software-related errors may be corrected by revising a portion of executable code, such as application code or firmware, causing the error, while errors that are determined to be hardware-related may require a hardware revision, such as a new stepping level of a processor. In any case, debugging enables developers and designers to identify a root cause of an error and implement an appropriate solution to correct it.
Processor-based systems may include on-chip features to support debugging, such as a debug interface, dedicated debug interconnects, hardware breakpoints, dedicated debug registers and/or caches, and so forth. While specific debug functionality and features may vary depending on processor architecture, one basic debug feature is the ability to retrieve (e.g., read) and manipulate (e.g., write) memory and register contents from the perspective of a processor. Many conventional implementations have required that a processor be in a suspended state in order to service a debug request involving a memory or register access.
In traditional debugging, when a debug request to access memory or a register, such as a program counter, is received, the processor temporarily enters a suspended state, processes the request, and then restarts. This type of debug, sometimes referred to as “stop mode” debug, is intrusive because the processor must stop all threads and prevent interrupts from being handled while servicing the debug request (e.g., reading from or writing to a particular memory address or register). Intrusive debug is undesirable for applications that rely on time critical deadlines. For instance, in a processor-based system that controls the spinning of a motor or the regulation of a power supply, it is undesirable for the processor to halt, even momentarily.
Due to the real-time nature of many modern systems, it is desirable to reduce the intrusiveness of debug. More recently, some processor architectures have been designed to support debug in “real-time” mode. In real-time mode, contents of memory and register locations can be retrieved and modified while the processor continues to execute code. For example, the processor may be halted for debug purposes, but will still respond to and service time critical interrupts.
As processor technology continues to increase in both complexity and speed, the debugging of electronic systems, such as embedded processing systems, has become increasing challenging. For example, some processor-based systems can now implement virtualized environments capable of running multiple operating systems. Accordingly, a debug request to access a particular memory address or register is of little use without knowledge of the particular process and/or operating system that is executing.